1. Field of the Invention
The present invention relates to an on die termination circuit, and more particularly to, a switch circuit for turning on or off resistors of an on die termination circuit.
2. Discussion of Related Art
Recently, a memory chip tendency is summarized as high integration and a high data processing speed. A DDR2 popularized in a main memory market is one example showing the tendency. That is, the memory has a capacity over 512 Mb and a data processing speed over 400 Mb per second.
In order to obtain a high data processing speed, the DDR2 newly uses an off chip driver scheme and an on die termination scheme. In the general on die termination scheme, source termination is performed at a transmission side by an output circuit, and parallel termination is performed at a reception side by a termination circuit connected in parallel to a receiving circuit connected to an input pad.
FIG. 1 is a circuit diagram illustrating a conventional on die termination circuit.
Referring to FIG. 1, the conventional on die termination circuit includes an input transmission line L1 for transmitting a data of an external input pin 10 to an input buffer 20, a first PMOS transistor P1 and a first resistor R1 and a second PMOS transistor P2 and a second resistor R2 connected in series between a first voltage source VDDQ and the input transmission line L1, respectively, and a first NMOS transistor N1 and a third resistor R3 and a second NMOS transistor N2 and a fourth resistor R4 connected in series between a second voltage source VSSQ and the input transmission line L1, respectively. The first PMOS transistor P1 is driven according to an inversed first termination signal/odt_sw1, and the second PMOS transistor P2 is driven according to an inverted second termination signal /odt_sw2. The first NMOS transistor N1 is driven according to a first termination signal odt_sw1, and the second NMOS transistor N2 is driven according to a second termination signal odt_sw2.
Preferably, the first and second resistors R1 and R3 use the same resistance value, and the second and fourth resistors R2 and R4 use the same resistance value. The resistance values of the first to fourth resistors R1 to R4 are very important in signal integrity. However, in a general process for manufacturing elements, processes of the NMOS transistors and the PMOS transistors are different from each other, and thus different turn-on resistances are generated. Accordingly, a pull-up resistance and a pull-down resistance are different from each other. That is, when it is presumed that a turn-on resistance of a pull-up PMOS transistor is Rp and a turn-on resistance of a pull-down NMOS transistor is Rn, a total termination resistance Rtt is {(R1+Rp)(R1+Rn)}/(2R1+Rp+Rn) or {(R2+Rp)(R2+Rn)}/(2R2+Rp+Rn). As a result, a termination voltage of the input pin does not have a value of Vdd/2, which has detrimental effects on signal integrity.